The term “MEMS” is used to refer to a class of miniaturized devices, typically produced using microfabrication techniques, which contain both an electrical and a mechanical component, and have a wide variety of potential applications ranging from sensors, electronics, optics, and actuators. While MEMS are used in numerous commercial applications, device performance and capabilities can further be enhanced by the additional availability of new and higher quality materials and fabrication processes.
SiC and compound semiconductors, particularly Group III-Nitride (III-N) materials such as gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), and their various alloys, have materials properties that are of great interest for MEMS applications, including high temperature stability and high electric field breakdown due to their wide band gap, excellent mechanical properties, and for III-N materials in particular, excellent piezoelectric properties. See V. Cimalla, J. Pezoldt, and O. Ambacher, “Group III nitride and SiC based MEMS and NEMS: material properties, technology and applications,” Journal of Physics D: Applied Physics 40, 6386 (2007).
Both SiC and III-N materials are currently used for electronic and optoelectronic devices such as transistors for power and high frequency applications and light-emitting diodes (LEDs) and lasers, and the ability to incorporate the properties of those devices into MEMS structures is of interest.
High quality single-crystal material is required for electronic and optoelectronic devices and while polycrystalline material can be used for purely mechanical devices, polycrystalline material can suffer from diminished mechanical and piezoelectric properties; therefore, a suitable release layer and growth method is required for producing high quality single-crystal functional layers.
MEMS processing requires a sacrificial release layer that can be selectively removed without damaging other layers in the device structure in order to create suspended MEMS structures. While single-crystal SiC and III-N materials are commonly grown on substrates such as SiC, GaN, AN, sapphire, and Si, there are limited methods for fabricating MEMS devices using single-crystal SiC and III-N materials due to the chemical inertness of SiC and III-Ns, making these materials difficult to etch chemically.
One method that overcomes the limitations of wet etching of single-crystal SiC and III-N materials to fabricate MEMS structures is photoelectrochemical (PEC) etching. See U.S. Pat. No. 5,374,564 to E. L. Hu and A. R. Stonas, entitled “Photoelectrochemical undercut etching of semiconductor material”; see also F. Zhao and M. M. Islam, “Fabrication of single-crystal silicon carbide MEMS/NEMS for biosensing and harsh environments,” 2011 IEEE 24th International Conference on Micro Electro Mechanical Systems (MEMS), 261 (2011). In PEC etching, an ultraviolet light source and suitable etchant solution are used to selectively etch a layer by oxidizing the layer surface and subsequent etching of the oxide layer. The ultraviolet light illumination is required to generate holes, which is necessary for the oxidation reaction of the layer to proceed.
While PEC etching has been used previously for MEMS fabrication, there are several limitations to the method. Using wet etching to remove the sacrificial layer and release the MEMS structure has an inherent disadvantage as liquid becomes trapped between the MEMS device and underlying layer as the etch proceeds. This can cause the suspended MEMS structure to be pulled into contact with the layer below where it can remain in contact, through a process known as “stiction.” This effect can reduce the yield of fabricated devices. Additionally, sample rinsing and drying may cause fragile suspended structures to break, further reducing yield. Another disadvantage of this method is that the MEMS structure design may be limited based on the selectivity of the etching process.
Selective etching of specific layers can be performed in one of two ways, bandgap-selective etching or dopant-selective etching.
In bandgap-selective etching, the photon energy of the ultraviolet light can be selected so that holes will only be photogenerated in the lowest band gap material of the structure, which becomes the sacrificial layer. For example, a ternary InGaN layer can be used as a sacrificial release layer grown beneath a GaN layer due to the smaller band gap of the InGaN layer.
In dopant-selective etching, etch selectivity is achieved through appropriate p-type or n-type doping of the layers, where the p-type layer is the functional layer and the n-type layer is the sacrificial release layer. In the case of p-type doping, the energy bands are bend downwards so holes move away from the surface, and the oxidation process cannot proceed. In the case of n-type doping, the energy bands at the surface of the layer in the etchant solution are bent upwards, allowing photogenerated holes to participate in the oxidation process at the layer surface.
PEC etching, bandgap-selective etching, and dopant-selective etching all have several drawbacks.
For example, in bandgap-selective etching, the material with the lowest band gap will be etched, which may limit the MEMS device design if the layer with the lowest band gap in the structure is to be a functional layer and an epitaxial material with a lower band gap cannot be grown as the sacrificial layer. Similarly, in dopant-selective etching, the n-type layer must be the sacrificial layer, limiting device design.
In addition, although not always necessary, metal electrodes can be patterned on the sample to act as a cathode and to control etch rate, selectivity, and morphology. This may require extra process steps not compatible with the device process, such as additional metal depositions, metal etching, etc. Further processing following the release step may reduce MEMS device yield as the released structures are fragile and may not withstand further processing steps.
Finally, the etchants used in PEC etching, such as potassium hydroxide (KOH) and hydrochloric acid (HCl), are known to etch various metals as well as III-N materials in certain instances. For example, KOH and HCl are known to etch N-polar GaN, but not Ga-polar GaN, and KOH has been used to etch AN and defects in GaN.
Another method used to fabricate suspended single-crystal III-N or SiC MEMS structures is via bulk micromachining where material is removed from the substrate to suspend the functional layers above.
For instance, single-crystal III-N functional layers grown on SiC can be suspended by selectively etching the SiC substrate isotropically beneath the III-N material to release the MEMS structure using a plasma-based dry etch. See F. Niebelschütz, V. Cimalla, K. Tonisch, Ch. Haupt, K. Brückner, R. Stephan, M. Hein, and O. Ambacher, “AlGaN/GaN-based MEMS with two-dimensional electron gas for novel sensor applications,” Physica Status Solidi C 5 (6), 1914 (2008). However, this method requires a special hard mask to protect the functional MEMS layers, which must be removed chemically after the dry etch release step, creating additional processing steps and potentially reducing device yield since further processing is required after the release step. Additionally, the dry etch must be done at elevated temperatures in order to be isotropic, which may not be not be compatible with the device thermal budget. Furthermore, plasma etching may potentially cause damage to functional layers.
Other release processes that have been used to fabricate suspended single-crystal III-N MEMS structures include wet etching, see H. W. Choi, K. N. Hui, P. T. Lai, P. Chen, X. H. Zhang, S. Tripathy, J. H. Teng, and S. J. Chua, “Lasing in GaN microdisks pivoted on Si,” Applied Physics Letters 89, 211101 (2006); plasma etching the front side of the Si substrate, see K. Brueckner, F. Niebelschuetz, K. Tonisch, S. Michael, A. Dadgar, A. Krost, V. Cimalla, O. Ambacher, R. Stephan, and M. A. Hein, “Two-dimensional electron gas based actuation of piezoelectric AlGaN/GaN microelectromechanical resonators,” Applied Physics Letters 93, 173504 (2008); dry etching vias through the backside of the Si substrate, see B. S. Kang, S. Kim, F. Ren, J. W. Johnson, R. J. Therrien, P. Rajagopal, J. C. Roberts, E. L. Piner, K. J. Linthicum, S. N. G. Chu, K. Baik, B. P. Gila, C. R. Abernathy, and S. J. Pearton, “Pressure-induced changes in the conductivity of AlGaN/GaN high-electron mobility-transistor membranes,” Applied Physics Letters 85 (14), 2962 (2004); and XeF2 etching the front side of the Si substrate, see A. Ansari and M. Rais-Zadeh, “A thickness-mode AlGaN/GaN resonant body high electron mobility transistor,” IEEE Transactions on Electron Devices 61 (4), 1006 (2014).
These methods also have significant drawbacks.
There are inherent disadvantages when using the substrate as the sacrificial layer including loss of dimensional control in the vertical direction due to the nature of isotropic etching and loss of ability to have functional layers underneath the sacrificial layer, which may be required in certain device structures.
In addition, the choice of substrate may be limited due to availability of bulk micromachining techniques available for a given substrate. For example, III-N materials are commonly grown on sapphire, but the substrate cannot be easily etched.
Moreover, bulk micromachining may not be compatible for functional layers grown homoepitaxially, i.e. GaN grown on GaN substrates or SiC grown on SiC substrates, where etch selectivity between the substrate and functional layers cannot be achieved. As mentioned above, wet chemical etching release methods may decrease yield via stiction or damage from rinsing or drying. Dry etching may cause plasma damage and may require extra processing steps such as hard mask deposition and removal, which may not be compatible with device process flow and may further reduce device yield due to additional processing steps after release.